14–17 Oct 2024
Bâtiment Salle d'Armes
Europe/Paris timezone

Thermal mission profile build up with Monte Carlo simulation

15 Oct 2024, 15:45
20m
Salle C (Bâtiment Salle d'Armes)

Salle C

Bâtiment Salle d'Armes

Speakers

Z. CELLIER (Stellantis) H. QIU (Stellantis) M. NDIAYE (Stellantis)

Description

Failure mechanism-based endurance tests are usually used for industrial products qualification. JEDEC test standard is used for semiconductor products qualification. The standard is the reference for applications like cellphone, personal computer, electronic gadgets etc. The electronic components working condition is more severe in automotive field thus a dedicated test standard AEC-Q is used as reference for automotive application. This standard is defined by Automotive Electronics Council for qualification propose. Semiconductor products, which can successfully pass AEC-Q test, can be automotive graded. In the standard, the components are classified into different families in respect of their electronic characteristic and applications. Specific tests and test flows are defined to each component family.
The thermal stress is one of main reliability factors. It is taken into consideration in test standards. The related tests include, but not limited to, high temperature operation, power thermal cycling, and temperature humidity bias. These tests are explained below.

Presentation materials